完整後設資料紀錄
DC 欄位語言
dc.contributor.authorWang, Jyh-Liangen_US
dc.contributor.authorYang, Po-Yuen_US
dc.contributor.authorJuang, Miin-Horngen_US
dc.contributor.authorHsieh, Tsang-Yenen_US
dc.contributor.authorHwang, Chuan-Chouen_US
dc.contributor.authorJuan, Chuan-Pingen_US
dc.contributor.authorLee, I-Cheen_US
dc.date.accessioned2014-12-08T15:33:46Z-
dc.date.available2014-12-08T15:33:46Z-
dc.date.issued2013-09-01en_US
dc.identifier.issn0257-8972en_US
dc.identifier.urihttp://dx.doi.org/10.1016/j.surfcoat.2012.02.029en_US
dc.identifier.urihttp://hdl.handle.net/11536/23331-
dc.description.abstractTransparent high-performance ZnO TFTs have been fabricated via low-temperature hydrothermal method. The dip of H3PO4 solution prior to the hydrothermal process can form the under-cut AZO seed layer and benefit for the control of ZnO growth. While the use of under-cut AZO seed layer with proper design of channel length, the lateral ZnO growth can be artificially controlled in the desired location to make a continuous active-layer and nearly single one vertical grain boundary cross to the current flow in the channel region. ZnO TFTs indicate the behavior of n-channel enhancement-mode devices. The optimum design of channel length (i.e. L=10 mu m) can provide enough space for the lateral growth of large ZnO grains with less channel defects and bring about the advanced device characteristics (i.e. the positive threshold voltage of 3.0 V, mobility of 9.03 cm(2)/V.s, on/off current ratio >10(6), gate leakage of <1 nA with less fluctuation, and extremely high drain current >500 mu A). (C) 2012 Elsevier B.V. All rights reserved.en_US
dc.language.isoen_USen_US
dc.subjectZinc oxide (ZnO)en_US
dc.subjectHydrothermal growth (HTG)en_US
dc.subjectThin-film transistors (TFTs)en_US
dc.subjectActive-layeren_US
dc.subjectLateral growthen_US
dc.titleZinc oxide thin-film transistors fabricated via low-temperature hydrothermal methoden_US
dc.typeArticleen_US
dc.identifier.doi10.1016/j.surfcoat.2012.02.029en_US
dc.identifier.journalSURFACE & COATINGS TECHNOLOGYen_US
dc.citation.volume231en_US
dc.citation.issueen_US
dc.citation.spage428en_US
dc.citation.epage432en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000328094200090-
dc.citation.woscount0-
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