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dc.contributor.authorLIN, SYen_US
dc.date.accessioned2014-12-08T15:03:48Z-
dc.date.available2014-12-08T15:03:48Z-
dc.date.issued1994-09-01en_US
dc.identifier.issn0018-9286en_US
dc.identifier.urihttp://dx.doi.org/10.1109/9.317119en_US
dc.identifier.urihttp://hdl.handle.net/11536/2350-
dc.description.abstractWe present a two-phase parallel computing method for obtaining an implementable receding horizon control solution for constrained nonlinear systems. The phase 1 method solves a feasibility problem to find an approximate open-loop admissible control and horizon pair. The phase 2 method successively improves the admissible control to obtain an implementable open-loop receding horizon control solution. We briefly sketch an approach to realizing this two-phase method using VLSI array processors. Solution times for simulation examples estimated on the basis of current VLSI technology confirm that our controller is well suited to the stabilization of real-time processing, fast, constrained nonlinear systems.en_US
dc.language.isoen_USen_US
dc.titleA HARDWARE IMPLEMENTABLE RECEDING HORIZON CONTROLLER FOR CONSTRAINED NONLINEAR-SYSTEMSen_US
dc.typeNoteen_US
dc.identifier.doi10.1109/9.317119en_US
dc.identifier.journalIEEE TRANSACTIONS ON AUTOMATIC CONTROLen_US
dc.citation.volume39en_US
dc.citation.issue9en_US
dc.citation.spage1893en_US
dc.citation.epage1899en_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.department電控工程研究所zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.contributor.departmentInstitute of Electrical and Control Engineeringen_US
dc.identifier.wosnumberWOS:A1994PG37300018-
dc.citation.woscount2-
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