完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | LIN, SY | en_US |
dc.date.accessioned | 2014-12-08T15:03:48Z | - |
dc.date.available | 2014-12-08T15:03:48Z | - |
dc.date.issued | 1994-09-01 | en_US |
dc.identifier.issn | 0018-9286 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/9.317119 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/2350 | - |
dc.description.abstract | We present a two-phase parallel computing method for obtaining an implementable receding horizon control solution for constrained nonlinear systems. The phase 1 method solves a feasibility problem to find an approximate open-loop admissible control and horizon pair. The phase 2 method successively improves the admissible control to obtain an implementable open-loop receding horizon control solution. We briefly sketch an approach to realizing this two-phase method using VLSI array processors. Solution times for simulation examples estimated on the basis of current VLSI technology confirm that our controller is well suited to the stabilization of real-time processing, fast, constrained nonlinear systems. | en_US |
dc.language.iso | en_US | en_US |
dc.title | A HARDWARE IMPLEMENTABLE RECEDING HORIZON CONTROLLER FOR CONSTRAINED NONLINEAR-SYSTEMS | en_US |
dc.type | Note | en_US |
dc.identifier.doi | 10.1109/9.317119 | en_US |
dc.identifier.journal | IEEE TRANSACTIONS ON AUTOMATIC CONTROL | en_US |
dc.citation.volume | 39 | en_US |
dc.citation.issue | 9 | en_US |
dc.citation.spage | 1893 | en_US |
dc.citation.epage | 1899 | en_US |
dc.contributor.department | 交大名義發表 | zh_TW |
dc.contributor.department | 電控工程研究所 | zh_TW |
dc.contributor.department | National Chiao Tung University | en_US |
dc.contributor.department | Institute of Electrical and Control Engineering | en_US |
dc.identifier.wosnumber | WOS:A1994PG37300018 | - |
dc.citation.woscount | 2 | - |
顯示於類別: | 期刊論文 |