Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Chiang, Pai-Tse | en_US |
dc.contributor.author | Chang, Tian Sheuan | en_US |
dc.date.accessioned | 2014-12-08T15:35:45Z | - |
dc.date.available | 2014-12-08T15:35:45Z | - |
dc.date.issued | 2013 | en_US |
dc.identifier.isbn | 978-1-4673-5762-3; 978-1-4673-5760-9 | en_US |
dc.identifier.issn | 0271-4302 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/24142 | - |
dc.description.abstract | This paper proposed a fast zero block detection for various transform size from 32x32 to 4x4 in the new generation of the High Efficiency Video Coding (HEVC) standard. The derivation is based on sum-of-absolute-difference (SAD) value available in the inter prediction computation. The proposed method achieves detection accuracy to 90% in average, and saves transform unit computation by 44% (QP at 22) and 65% (QP at 32) with negligible coding performance loss, when compared with that of HM4.0rc1. Additionally, this pre-skip detection could further help decide the CU inter mode efficiently with about 50% time saving. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Fast Zero Block Detection and Early CU Termination for HEVC Video Coding | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2013 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | en_US |
dc.citation.spage | 1640 | en_US |
dc.citation.epage | 1643 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000332006801219 | - |
Appears in Collections: | Conferences Paper |