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dc.contributor.authorChiang, Pai-Tseen_US
dc.contributor.authorChang, Tian Sheuanen_US
dc.date.accessioned2014-12-08T15:35:45Z-
dc.date.available2014-12-08T15:35:45Z-
dc.date.issued2013en_US
dc.identifier.isbn978-1-4673-5762-3; 978-1-4673-5760-9en_US
dc.identifier.issn0271-4302en_US
dc.identifier.urihttp://hdl.handle.net/11536/24142-
dc.description.abstractThis paper proposed a fast zero block detection for various transform size from 32x32 to 4x4 in the new generation of the High Efficiency Video Coding (HEVC) standard. The derivation is based on sum-of-absolute-difference (SAD) value available in the inter prediction computation. The proposed method achieves detection accuracy to 90% in average, and saves transform unit computation by 44% (QP at 22) and 65% (QP at 32) with negligible coding performance loss, when compared with that of HM4.0rc1. Additionally, this pre-skip detection could further help decide the CU inter mode efficiently with about 50% time saving.en_US
dc.language.isoen_USen_US
dc.titleFast Zero Block Detection and Early CU Termination for HEVC Video Codingen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2013 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)en_US
dc.citation.spage1640en_US
dc.citation.epage1643en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000332006801219-
Appears in Collections:Conferences Paper