標題: | Ring-VCO Based Low Noise and Low Spur Frequency Synthesizer |
作者: | Liao, Te-Wen Su, Jun-Ren Hung, Chung-Chih 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | Low Phase-Noise PLL;Ring VCO;Frequency synthesizer |
公開日期: | 2013 |
摘要: | This paper presents a low phase-noise phase locked loop (PLL) system with a Multi-Phase Over-Sampling Charge Pump (MPOSCP) for wireless applications. The low phase-noise frequency synthesizer reduces ripples and noise on the control voltage of the ring voltage-controlled oscillator (VCO) as a means to control in-band noise at the output of the PLL. An MPOSCP is proposed to perform multi-phase over-sampling control for the charge pump (CP) in locked state. The proposed frequency synthesizer was fabricated using the TSMC 90-nm CMOS process. The prototype occupies 0.046mm2 active area, the reference frequency is 27 MHz, and the output frequency is 432 MHz with the total power consumption of 7 mW. The PLL achieved phase noise below - 100 dBc/Hz from 15 Hz to 100 kHz with the reference spurs below - 48 dBc. |
URI: | http://hdl.handle.net/11536/24143 |
ISBN: | 978-1-4673-5762-3; 978-1-4673-5760-9 |
ISSN: | 0271-4302 |
期刊: | 2013 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) |
起始頁: | 1861 |
結束頁: | 1864 |
顯示於類別: | 會議論文 |