標題: Energy-Effective Sub-Threshold Interconnect Design Using High-Boosting Predrivers
作者: Ho, Yingchieh
Chen, Hung-Kai
Su, Chauchin
電機工程學系
電控工程研究所
Department of Electrical and Computer Engineering
Institute of Electrical and Control Engineering
公開日期: 1-六月-2012
摘要: This paper investigates the performance of the interconnects with repeater insertion in the subthreshold region. A 3X complementary metal-oxide-semiconductor (CMOS) predriver and a 4X one are proposed to enhance the driving capability. As compared to the conventional repeater, the proposed ones have higher energy efficiency. In addition, the results of Monte Carlo analysis indicate that the propose predrivers have higher concentration under the process and temperature variation than conventional one at 0.15 V. A test chip with 3X and 4X predrivers for 10-mm on-chip bus has been fabricated in 65 nm SPRVT CMOS process. The measured results show that the 3X (4X) predrivers can achieve 5 Mb/s (1.5 Mb/s) data rate at 0.15 V with an efficiency of 35.2 fJ (32.8 fJ).
URI: http://dx.doi.org/10.1109/JETCAS.2012.2193841
http://hdl.handle.net/11536/24593
ISSN: 2156-3357
DOI: 10.1109/JETCAS.2012.2193841
期刊: IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS
Volume: 2
Issue: 2
起始頁: 307
結束頁: 313
顯示於類別:期刊論文