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dc.contributor.authorYEH, CFen_US
dc.contributor.authorCHEN, CLen_US
dc.date.accessioned2014-12-08T15:03:56Z-
dc.date.available2014-12-08T15:03:56Z-
dc.date.issued1994-06-01en_US
dc.identifier.issn0268-1242en_US
dc.identifier.urihttp://dx.doi.org/10.1088/0268-1242/9/6/015en_US
dc.identifier.urihttp://hdl.handle.net/11536/2459-
dc.description.abstractIn multilevel interconnection processes, because thermal stress affects device characteristics and wiring reliability, low-temperature deposition has been required for interlayer dielectrics (SiO2). This research investigated high growth rate and selective growth conditions of room-temperature interlayer dielectrics formed using the liquid-phase deposition method. The dependence of deposition rate on growth temperature and H3BO3 concentration is confirmed, and a concentration of 3.8 mol l-1 of H2SiF6 is used to achieve a high deposition rate of 1250 angstrom h-1. The degree of supersaturation of silica of the immersing solution is found to define three ranges of growth conditions: the non-deposition range, selective deposition range, and conformal deposition range. A selective deposition model is proposed to clarify the mechanism of room-temperature selective SiO2 growth,en_US
dc.language.isoen_USen_US
dc.titleROOM-TEMPERATURE SELECTIVE GROWTH OF DIELECTRIC FILMS BY LIQUID-PHASE DEPOSITIONen_US
dc.typeArticleen_US
dc.identifier.doi10.1088/0268-1242/9/6/015en_US
dc.identifier.journalSEMICONDUCTOR SCIENCE AND TECHNOLOGYen_US
dc.citation.volume9en_US
dc.citation.issue6en_US
dc.citation.spage1250en_US
dc.citation.epage1254en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:A1994NQ79100015-
dc.citation.woscount14-
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