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dc.contributor.authorLEE, CLen_US
dc.contributor.authorJEN, CWen_US
dc.date.accessioned2014-12-08T15:03:57Z-
dc.date.available2014-12-08T15:03:57Z-
dc.date.issued1994-06-01en_US
dc.identifier.issn1057-7122en_US
dc.identifier.urihttp://dx.doi.org/10.1109/81.295242en_US
dc.identifier.urihttp://hdl.handle.net/11536/2478-
dc.description.abstractThe threshold gate is a very good candidate in the realization of order statistic filtering. In this brief paper, a simple procedure is developed to determine the circuit parameters for a set of output-wired CMOS inverters in order to implement threshold functions for order statistic filtering. Weighted and nonweighted order statistic filters in either binary or integer domain can be easily realized in similar architectures. An incremental scheme is also proposed to construct threshold gate networks for general or multi-stage order statistic filters.en_US
dc.language.isoen_USen_US
dc.titleCMOS THRESHOLD GATE AND NETWORKS FOR ORDER STATISTIC FILTERINGen_US
dc.typeNoteen_US
dc.identifier.doi10.1109/81.295242en_US
dc.identifier.journalIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-FUNDAMENTAL THEORY AND APPLICATIONSen_US
dc.citation.volume41en_US
dc.citation.issue6en_US
dc.citation.spage453en_US
dc.citation.epage456en_US
dc.contributor.department電控工程研究所zh_TW
dc.contributor.departmentInstitute of Electrical and Control Engineeringen_US
dc.identifier.wosnumberWOS:A1994NW85800003-
dc.citation.woscount13-
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