CMOS THRESHOLD GATE AND NETWORKS FOR ORDER STATISTIC FILTERING

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DC 欄位	值	語言
dc.contributor.author	LEE, CL	en_US
dc.contributor.author	JEN, CW	en_US
dc.date.accessioned	2014-12-08T15:03:57Z	-
dc.date.available	2014-12-08T15:03:57Z	-
dc.date.issued	1994-06-01	en_US
dc.identifier.issn	1057-7122	en_US
dc.identifier.uri	http://dx.doi.org/10.1109/81.295242	en_US
dc.identifier.uri	http://hdl.handle.net/11536/2478	-
dc.description.abstract	The threshold gate is a very good candidate in the realization of order statistic filtering. In this brief paper, a simple procedure is developed to determine the circuit parameters for a set of output-wired CMOS inverters in order to implement threshold functions for order statistic filtering. Weighted and nonweighted order statistic filters in either binary or integer domain can be easily realized in similar architectures. An incremental scheme is also proposed to construct threshold gate networks for general or multi-stage order statistic filters.	en_US
dc.language.iso	en_US	en_US
dc.title	CMOS THRESHOLD GATE AND NETWORKS FOR ORDER STATISTIC FILTERING	en_US
dc.type	Note	en_US
dc.identifier.doi	10.1109/81.295242	en_US
dc.identifier.journal	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-FUNDAMENTAL THEORY AND APPLICATIONS	en_US
dc.citation.volume	41	en_US
dc.citation.issue	6	en_US
dc.citation.spage	453	en_US
dc.citation.epage	456	en_US
dc.contributor.department	電控工程研究所	zh_TW
dc.contributor.department	Institute of Electrical and Control Engineering	en_US
dc.identifier.wosnumber	WOS:A1994NW85800003	-
dc.citation.woscount	13	-
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