Novel Omega-Shaped-Gated TFT SONOS Memory

doi:10.1149/1.3203952

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	Liao, Ta-Chuan	en_US
dc.contributor.author	Chen, Sheng-Kai	en_US
dc.contributor.author	Kang, Tsung-Kuei	en_US
dc.contributor.author	Hsu, Pang-Yu	en_US
dc.contributor.author	Lin, Chia-Min	en_US
dc.contributor.author	Cheng, Huang-Chung	en_US
dc.date.accessioned	2014-12-08T15:36:27Z	-
dc.date.available	2014-12-08T15:36:27Z	-
dc.date.issued	2009	en_US
dc.identifier.isbn	978-1-60768-094-9; 978-1-56677-744-5	en_US
dc.identifier.issn	1938-5862	en_US
dc.identifier.uri	http://hdl.handle.net/11536/24795	-
dc.identifier.uri	http://dx.doi.org/10.1149/1.3203952	en_US
dc.description.abstract	A novel omega-shaped-gated (Omega-Gate) polycrystalline-silicon thin-film transistor (TFT) silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile memory with field-enhanced nanowire (FEN) structure has been proposed to improve the program and erase (P/E) performance. Each nanowire inherently had twin sharp corners fabricated simply by sidewall spacer formation to obtain high local electric fields. The field-enhanced carrier tunneling via such a structure led to faster P/E speed and wider memory window for the Omega-Gate SONOS as compared to the conventional planar (CP) counterpart. Such an Omega-Gate-TFT SONOS memory using a simple process is very suitable for future system-on-panel applications.	en_US
dc.language.iso	en_US	en_US
dc.title	Novel Omega-Shaped-Gated TFT SONOS Memory	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.doi	10.1149/1.3203952	en_US
dc.identifier.journal	ULSI PROCESS INTEGRATION 6	en_US
dc.citation.volume	25	en_US
dc.citation.issue	7	en_US
dc.citation.spage	163	en_US
dc.citation.epage	168	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:000338102400013	-
顯示於類別：	會議論文