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dc.contributor.authorShen, Bor-Yehen_US
dc.contributor.authorHsu, Wei-Chungen_US
dc.contributor.authorYang, Wuuen_US
dc.date.accessioned2014-12-08T15:36:44Z-
dc.date.available2014-12-08T15:36:44Z-
dc.date.issued2014-06-01en_US
dc.identifier.issn1544-3566en_US
dc.identifier.urihttp://dx.doi.org/10.1145/2629335en_US
dc.identifier.urihttp://hdl.handle.net/11536/25095-
dc.description.abstractMachines designed with new but incompatible Instruction Set Architecture (ISA) may lack proper applications. Binary translation can address this incompatibility by migrating applications from one legacy ISA to a new one, although binary translation has problems such as code discovery for variable-length ISA and code location issues for handling indirect branches. Dynamic Binary Translation (DBT) has been widely adopted for migrating applications since it avoids those problems. Static Binary Translation (SBT) is a less general solution and has not been actively researched. However, SBT performs more aggressive optimizations, which could yield more compact code and better code quality. Applications translated by SBT can consume less memory, processor cycles, and power than DBT and can be started more quickly. These advantages are even more critical for embedded systems than for general systems. In this article, we designed and implemented a new SBT tool, called LLBT, which translates ARM instructions into LLVM IRs and then retargets the LLVM IRs to various ISAs, including x86, x86-64, ARM, and MIPS. LLBT leverages two important functionalities from LLVM: comprehensive optimizations and retargetability. More importantly, LLBT solves the code discovery problem for ARM/Thumb binaries without resorting to interpretation. LLBT also effectively reduced the size of the address mapping table, making SBT a viable solution for embedded systems. Our experiments based on the EEMBC benchmark suite show that the LLBT-generated code can run more than 6x and 2.3x faster on average than emulation with QEMU and HQEMU, respectively.en_US
dc.language.isoen_USen_US
dc.subjectDesignen_US
dc.subjectLanguagesen_US
dc.subjectPerformanceen_US
dc.subjectBinary translationen_US
dc.subjectcompileren_US
dc.subjectretargetingen_US
dc.subjectintermediate representationen_US
dc.titleA Retargetable Static Binary Translator for the ARM Architectureen_US
dc.typeArticleen_US
dc.identifier.doi10.1145/2629335en_US
dc.identifier.journalACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATIONen_US
dc.citation.volume11en_US
dc.citation.issue2en_US
dc.citation.spage87en_US
dc.citation.epage111en_US
dc.contributor.department資訊工程學系zh_TW
dc.contributor.departmentDepartment of Computer Scienceen_US
dc.identifier.wosnumberWOS:000341066600004-
dc.citation.woscount0-
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