標題: | A SYSTOLIC DESIGN FOR GENERATING PERMUTATIONS IN LEXICOGRAPHIC ORDER |
作者: | LEE, WP TSAY, JC 工學院 College of Engineering |
關鍵字: | COMBINATORIAL OBJECTS;LEXICOGRAPHIC ORDER;PERMUTATION GENERATION;SYSTOLIC ALGORITHM;VLSI |
公開日期: | 1-五月-1994 |
摘要: | In this paper, we shall design a systolic algorithm for generating all N! permutations of N objects. The algorithm is time efficient, generates all permutations in lexicographic order, and can be executed on a simple computation model (systolic array). Furthermore, because the algorithm is systolic, it is suitable for VLSI implementation. |
URI: | http://hdl.handle.net/11536/2522 |
ISSN: | 0167-8191 |
期刊: | PARALLEL COMPUTING |
Volume: | 20 |
Issue: | 5 |
起始頁: | 775 |
結束頁: | 785 |
顯示於類別: | 期刊論文 |