完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chen, CW | en_US |
dc.contributor.author | Chien, CH | en_US |
dc.contributor.author | Perng, TH | en_US |
dc.contributor.author | Chang, CY | en_US |
dc.date.accessioned | 2014-12-08T15:37:06Z | - |
dc.date.available | 2014-12-08T15:37:06Z | - |
dc.date.issued | 2005 | en_US |
dc.identifier.issn | 1099-0062 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/25475 | - |
dc.identifier.uri | http://dx.doi.org/10.1149/1.1938851 | en_US |
dc.description.abstract | The device degradation caused by the hot-electron-induced electron trapping in the ultrathin (equivalent oxide thickness = 1.6 nm) nitrided gate oxide for the 0.13 mu m n-metal oxide semiconductor field effect transistors (n-MOSFETs) has been investigated. We have found that the nitrogen, incorporated in the gate dielectrics by a variety of popular techniques including Si3N4/SiO2 (N/O) stack, NO annealing, and plasma nitridation, results in enhanced hot-electron-induced device degradations as compared to the conventional gate oxide counterpart. The enhanced hot-electron degradations are attributed to the electron trap generation in the ultrathin gate dielectric rather than the interface state generation as a result of nitrogen incorporation. (c) 2005 The Electrochemical Society. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Hot-electron-induced electron trapping in 0.13 mu m nMOSFETs with ultrathin (EOT=1.6 nm) nitrided gate oxide | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1149/1.1938851 | en_US |
dc.identifier.journal | ELECTROCHEMICAL AND SOLID STATE LETTERS | en_US |
dc.citation.volume | 8 | en_US |
dc.citation.issue | 8 | en_US |
dc.citation.spage | G187 | en_US |
dc.citation.epage | G189 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000230931300021 | - |
dc.citation.woscount | 0 | - |
顯示於類別: | 期刊論文 |