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dc.contributor.authorSun, CLen_US
dc.contributor.authorChen, SYen_US
dc.contributor.authorLiao, CCen_US
dc.contributor.authorChin, Aen_US
dc.date.accessioned2014-12-08T15:37:18Z-
dc.date.available2014-12-08T15:37:18Z-
dc.date.issued2004-11-15en_US
dc.identifier.issn0003-6951en_US
dc.identifier.urihttp://dx.doi.org/10.1063/1.1814440en_US
dc.identifier.urihttp://hdl.handle.net/11536/25638-
dc.description.abstractWe have developed one-transistor ferroelectric memory using lead titanate (PTO) as a gate dielectric directly formed on Si without any buffer layer. The PTO/Si metal-oxide-semiconductor field-effect transistor memory has shown a large threshold voltage shift of 1.6 V at only +/-4 V program/erase voltages. The corresponding good interface was achieved by lowering the anneal temperature to 450 degreesC. Besides the sharp capacitance change of 0.17 muF/V cm(2), it was also evidenced by the high mobility of 169 cm(2)/V s close to high-kappa HfO2. In addition, long retention >1000 s and endurance >10(11) stress cycles in the device suggested good memory characteristics. (C) 2004 American Institute of Physics.en_US
dc.language.isoen_USen_US
dc.titleLow voltage lead titanate/Si one-transistor ferroelectric memory with good device characteristicsen_US
dc.typeArticleen_US
dc.identifier.doi10.1063/1.1814440en_US
dc.identifier.journalAPPLIED PHYSICS LETTERSen_US
dc.citation.volume85en_US
dc.citation.issue20en_US
dc.citation.spage4726en_US
dc.citation.epage4728en_US
dc.contributor.department材料科學與工程學系zh_TW
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Materials Science and Engineeringen_US
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000225166400056-
dc.citation.woscount9-
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