完整後設資料紀錄
DC 欄位語言
dc.contributor.authorChen, YHen_US
dc.contributor.authorCheng, TYen_US
dc.contributor.authorChang, CYen_US
dc.date.accessioned2014-12-08T15:37:24Z-
dc.date.available2014-12-08T15:37:24Z-
dc.date.issued2004-11-01en_US
dc.identifier.issn0021-4922en_US
dc.identifier.urihttp://dx.doi.org/10.1143/JJAP.43.7439en_US
dc.identifier.urihttp://hdl.handle.net/11536/25727-
dc.description.abstractThis circuit is a single chip of a BiCMOS wafer used in cable TV set-top converters;, cable modems, cable TV tuners and digital TVs. It is a double conversion tuner (DCT) structure which has better performance characteristics than the single conversion tuner (SCT). This single chip comprises two LNAs, one AGC, two LO buffers, two VCOs, two resistor-type and double-balanced Gilbert cell mixers, two synthesizers and ESD protection. Its total gain is 45.70 dB, and its total noise figure is 4.3-7.9 dB. The RF varied range, which is not only 50-860 MHz but also 50-1000 MHz, can be applied in cable TV tuners and cable modems. The consuming power is 0.885 W under 3 V and the die size is 4.8 mm(2).en_US
dc.language.isoen_USen_US
dc.subjecttuneren_US
dc.subjectBiCMOSen_US
dc.subjectdouble conversionen_US
dc.subjectmonolithicen_US
dc.subjectcable TVen_US
dc.subjectdigital TVen_US
dc.subjectset-top boxen_US
dc.titleA broadband and low cost monolithic BiCMOS tuner chipen_US
dc.typeArticleen_US
dc.identifier.doi10.1143/JJAP.43.7439en_US
dc.identifier.journalJAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERSen_US
dc.citation.volume43en_US
dc.citation.issue11Aen_US
dc.citation.spage7439en_US
dc.citation.epage7443en_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.identifier.wosnumberWOS:000225582000014-
dc.citation.woscount0-
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