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dc.contributor.authorLu, WTen_US
dc.contributor.authorLin, PCen_US
dc.contributor.authorHuang, TYen_US
dc.contributor.authorChien, CHen_US
dc.contributor.authorYang, MJen_US
dc.contributor.authorHuang, IJen_US
dc.contributor.authorLehnen, Pen_US
dc.date.accessioned2014-12-08T15:37:26Z-
dc.date.available2014-12-08T15:37:26Z-
dc.date.issued2004-10-18en_US
dc.identifier.issn0003-6951en_US
dc.identifier.urihttp://dx.doi.org/10.1063/1.1808228en_US
dc.identifier.urihttp://hdl.handle.net/11536/25751-
dc.description.abstractThe characteristics of charge trapping during constant voltage stress in an n-type metal-oxide-semiconductor capacitor with HfO2/SiO2 gate stack and TiN gate electrode were studied. We found that the dominant charge trapping mechanism in the high-k gate stack is hole trapping rather than electron trapping. This behavior can be well described by the distributed capture cross-section model. In particular, the flatband voltage shift (DeltaV(fb)) is mainly caused by the trap filling instead of the trap creation [Zafar , J. Appl. Phys. 93, 9298 (2003)]. The dominant hole trapping can be ascribed to a higher probability for hole tunneling from the substrate, compared to electron tunneling from the gate, due to a shorter tunneling path over the barrier for holes due to the work function of the TiN gate electrode. (C) 2004 American Institute of Physics.en_US
dc.language.isoen_USen_US
dc.titleThe characteristics of hole trapping in HfO2/SiO2 gate dielectrics with TiN gate electrodeen_US
dc.typeArticleen_US
dc.identifier.doi10.1063/1.1808228en_US
dc.identifier.journalAPPLIED PHYSICS LETTERSen_US
dc.citation.volume85en_US
dc.citation.issue16en_US
dc.citation.spage3525en_US
dc.citation.epage3527en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000224658100062-
dc.citation.woscount24-
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