標題: A 1 GHz Equiripple Low-Pass Filter With a High-Speed Automatic Tuning Scheme
作者: Lo, Tien-Yu
Hung, Chung-Chih
電機工程學系
Department of Electrical and Computer Engineering
關鍵字: Automatic tuning circuit;deep N-WELL technology;equiripple linear-phase;operational transconductance amplifier (OTA)
公開日期: 1-二月-2011
摘要: A continuous-time fourth-order equiripple linear phase G(m) - C filter with an automatic tuning circuit is presented. A high speed OTA based on the inverter structure is realized. The combined common-mode feedforward and common-mode feedback circuit ensures the input and output common-mode stability. The gain performance could be maintained by combining an equivalent negative resistor circuit at the output nodes. Transconductance tuning can be achieved by adjusting the bulk voltage by using the deep-NWELL technology. The modified automatic tuning circuit relaxes the speed requirement of the tuning blocks. Through the use of the operational transconductance amplifier as a building block with the automatic tuning scheme, the filter -3 dB cutoff frequency is 1 GHz with the group delay less than 4% variation up to 1.5 fc frequency. The -43 dB of IM3 at filter cutoff frequency is obtained with -4 dbm two-tone signals. Implemented in 0.18-mu m CMOS process, the chip occupies 1 mm(2) and consumes 175 mW at a 1.5-V supply voltage.
URI: http://dx.doi.org/10.1109/TVLSI.2009.2034527
http://hdl.handle.net/11536/25847
ISSN: 1063-8210
DOI: 10.1109/TVLSI.2009.2034527
期刊: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
Volume: 19
Issue: 2
起始頁: 175
結束頁: 181
顯示於類別:期刊論文


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