完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.author | Huang, C. C. | en_US |
| dc.contributor.author | Chang, S. J. | en_US |
| dc.contributor.author | Kuo, C. H. | en_US |
| dc.contributor.author | Wu, C. H. | en_US |
| dc.contributor.author | Ko, C. H. | en_US |
| dc.contributor.author | Wann, Clement H. | en_US |
| dc.contributor.author | Cheng, Y. C. | en_US |
| dc.contributor.author | Lin, W. J. | en_US |
| dc.date.accessioned | 2014-12-08T15:37:49Z | - |
| dc.date.available | 2014-12-08T15:37:49Z | - |
| dc.date.issued | 2011 | en_US |
| dc.identifier.issn | 0013-4651 | en_US |
| dc.identifier.uri | http://hdl.handle.net/11536/26002 | - |
| dc.identifier.uri | http://dx.doi.org/10.1149/1.3569753 | en_US |
| dc.description.abstract | The authors report the growth of GaN epitaxial layers on nano-patterned Si(001) substrates prepared by the standard facilities used in integrated circuit (IC) industry. It was found that we could achieve high-quality single crystalline GaN by using the 50 nm SiO(2) recess patterned Si(001) substrate. It was also found that we can reduce the tensile stress in GaN epitaxial layer by about 95% using the nano-patterned Si(001) substrate, as compared to the conventional un-patterned Si(111) substrate. (C) 2011 The Electrochemical Society. [DOI: 10.1149/1.3569753] All rights reserved. | en_US |
| dc.language.iso | en_US | en_US |
| dc.title | Single Crystalline GaN Epitaxial Layer Prepared on Nano-Patterned Si(001) Substrate | en_US |
| dc.type | Article | en_US |
| dc.identifier.doi | 10.1149/1.3569753 | en_US |
| dc.identifier.journal | JOURNAL OF THE ELECTROCHEMICAL SOCIETY | en_US |
| dc.citation.volume | 158 | en_US |
| dc.citation.issue | 6 | en_US |
| dc.citation.spage | H626 | en_US |
| dc.citation.epage | H629 | en_US |
| dc.contributor.department | 照明與能源光電研究所 | zh_TW |
| dc.contributor.department | Institute of Lighting and Energy Photonics | en_US |
| dc.identifier.wosnumber | WOS:000289854700087 | - |
| dc.citation.woscount | 0 | - |
| 顯示於類別: | 期刊論文 | |

