完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chen, Hou-Yu | en_US |
dc.contributor.author | Lin, Chia-Yi | en_US |
dc.contributor.author | Chen, Min-Cheng | en_US |
dc.contributor.author | Huang, Chien-Chao | en_US |
dc.contributor.author | Chien, Chao-Hsin | en_US |
dc.date.accessioned | 2014-12-08T15:38:10Z | - |
dc.date.available | 2014-12-08T15:38:10Z | - |
dc.date.issued | 2011 | en_US |
dc.identifier.issn | 0013-4651 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/26187 | - |
dc.identifier.uri | http://dx.doi.org/10.1149/1.3601849 | en_US |
dc.description.abstract | The formation of a uniform, high tensile stress and low silicide/Si interfacial resistance nickel silicide in nMOSFET by introducing pulsed laser annealing (PLA) is reported. This annealing approach facilitated the phase transformation of nickel silicide to Si-rich NiSi(x) compounds using a low-thermal-budget process, improves the silicide/Si interface regularity and avoids familiar (111) NiSi(2) facet formation at a laser energy of 1.5 J cm(-2). By increasing laser energy density up to 2.3 J cm(-2), the device performance and statistics junction leakage distribution were degraded due to the increased sheet resistance of silicide layer and the destroyed silicide/Si interface morphology. When the PLA with a laser energy density of 1.5 J cm(-2) was employed for nickel silicidation on the p-type Schottky diodes, a 0.16 eV hole Schottky barrier height (SBH) increase from 0.52 to 0.68 eV was observed. In addition, the application of PLA for source/drain silicidation of nMOSFETs demonstrated an 8% enhancement in I(on) I(off) characteristic relative to that obtained through the conventional two-step rapid thermal annealing (RTA). This PLA method holds promise as a potential replacement for current nickel silicide annealing approaches toward extremely scaled-down transistors. (C) 2011 The Electrochemical Society. [DOI: 10.1149/1.3601849] All rights reserved. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Nickel Silicide Formation using Pulsed Laser Annealing for nMOSFET Performance Improvement | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1149/1.3601849 | en_US |
dc.identifier.journal | JOURNAL OF THE ELECTROCHEMICAL SOCIETY | en_US |
dc.citation.volume | 158 | en_US |
dc.citation.issue | 8 | en_US |
dc.citation.spage | H840 | en_US |
dc.citation.epage | H845 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000292154300087 | - |
dc.citation.woscount | 3 | - |
顯示於類別: | 期刊論文 |