Wafer-Level Self-Aligned Nano Tubular Structures and Templates for Device Applications

Abstract

A method to fabricate self-aligned nano-scale tubular structures is introduced and investigated. These tubular structures, can be fabricated on wafer-level using common CMOS technologies, are robust and cannot be removed through standard etching or resist strip techniques. This method has shown the potential to be used in different nano device applications since the size of nano-scale tubular structures is adjustable. In addition, these structures can be fabricated as nano-scale templates in advanced device applications.