A Spur-Reduction Frequency Synthesizer For WIMAX Applications

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	Liao, De-Wen	en_US
dc.contributor.author	Hung, Chung-Chih	en_US
dc.date.accessioned	2014-12-08T15:38:40Z	-
dc.date.available	2014-12-08T15:38:40Z	-
dc.date.issued	2010	en_US
dc.identifier.isbn	978-1-4244-5309-2	en_US
dc.identifier.issn	0271-4302	en_US
dc.identifier.uri	http://hdl.handle.net/11536/26465	-
dc.description.abstract	A spur-reduction frequency synthesizer proposed in 0.18-um CMOS technology is developed for WIMAX applications. It incorporates a random charge pump to randomize the reference spur so as to accomplish a low spur level or a relatively smooth spectrum and a fast lock synthesizer. This frequency synthesizer achieves the phase noise of -124dBc/Hz at 1MHz offset frequency and reference spurs below -70dBc. The spur tones of the frequency synthesizer are greatly in frequency domain and the power consumption is 28mW.	en_US
dc.language.iso	en_US	en_US
dc.subject	PLL	en_US
dc.subject	VCO	en_US
dc.subject	Synthesizer	en_US
dc.title	A Spur-Reduction Frequency Synthesizer For WIMAX Applications	en_US
dc.type	Article	en_US
dc.identifier.journal	2010 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS	en_US
dc.citation.spage	2594	en_US
dc.citation.epage	2597	en_US
dc.contributor.department	電機工程學系	zh_TW
dc.contributor.department	Department of Electrical and Computer Engineering	en_US
dc.identifier.wosnumber	WOS:000287216002203	-
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