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dc.contributor.authorLee, Yu-Hueien_US
dc.contributor.authorChen, Ke-Horngen_US
dc.contributor.authorLin, Ying-Hsien_US
dc.contributor.authorYang, Yao-Yien_US
dc.contributor.authorWang, Shih-Jungen_US
dc.contributor.authorChen, Yi-Kuangen_US
dc.contributor.authorHuang, Chen-Chihen_US
dc.date.accessioned2014-12-08T15:39:31Z-
dc.date.available2014-12-08T15:39:31Z-
dc.date.issued2010en_US
dc.identifier.isbn978-1-4244-7636-7en_US
dc.identifier.urihttp://hdl.handle.net/11536/26976-
dc.identifier.urihttp://dx.doi.org/10.1109/VLSIC.2010.5560272en_US
dc.description.abstractThis interleaving energy-conservation mode control for single-inductor dual-output converter uses the superposition technique to yield the optimal average inductor current and 91% peak efficiency. Neither a freewheel stage nor a post-regulator is needed at nominal conditions. The output voltage ripple appears notably minimized over 50% by means of current interleaving at full load. The chip occupies 1.44 mm(2) in 65 nm CMOS and integrates with a 3D architecture for ultra-wide band system.en_US
dc.language.isoen_USen_US
dc.titleAn Interleaving Energy-Conservation Mode (IECM) Control in Single-Inductor Dual-Output (SIDO) Step-Down Converters with 91% Peak Efficiencyen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/VLSIC.2010.5560272en_US
dc.identifier.journal2010 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERSen_US
dc.citation.spage57en_US
dc.citation.epage58en_US
dc.contributor.department電控工程研究所zh_TW
dc.contributor.departmentInstitute of Electrical and Control Engineeringen_US
dc.identifier.wosnumberWOS:000287508300020-
Appears in Collections:Conferences Paper


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