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dc.contributor.authorYu, DSen_US
dc.contributor.authorHuang, CHen_US
dc.contributor.authorChin, Aen_US
dc.contributor.authorZhu, CXen_US
dc.contributor.authorLi, MFen_US
dc.contributor.authorCho, BJen_US
dc.contributor.authorKwong, DLen_US
dc.date.accessioned2014-12-08T15:39:32Z-
dc.date.available2014-12-08T15:39:32Z-
dc.date.issued2004-03-01en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/LED.2004.824249en_US
dc.identifier.urihttp://hdl.handle.net/11536/26991-
dc.description.abstractHigh-kappa, A1(2)O(3)/Ge-on-insulator (GOI) n- and p-MOSFETs with fully silicided NiSi and germanided NiGe dual gates were fabricated. At 1.7-nm equivalent-oxide-thickness (EOT), the A1(2)O(3)-GOI with metal-like NiSi and NiGe gates has comparable gate leakage current with A1(2)O(3)-Si MOSFETs. Additionally, A1(2) O-3-GOI C-MOSFETs with fully NiSi and NiGe gates show 1.94 and 1.98 times higher electron and hole mobility, respectively, than A1(2)O(3)-Si devices, because the electron and hole effective masses of Ge are lower than those of Si. The process with maximum 500 degreesC rapid thermal annealing (RTA) is ideal for integrating metallic gates with high-kappa to minimize interfacial reactions and crystallization of the high-kappa material, and oxygen penetration in high-kappa MOSFETs.en_US
dc.language.isoen_USen_US
dc.subjectGeen_US
dc.subjectGe-on-insulator (GOI)en_US
dc.subjectMOSFETen_US
dc.subjectNiGeen_US
dc.subjectNiSien_US
dc.titleAl2O3-Ge-On-insulator n- and p-MOSFETs with fully NiSi and NiGe dual gatesen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/LED.2004.824249en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume25en_US
dc.citation.issue3en_US
dc.citation.spage138en_US
dc.citation.epage140en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000189389600008-
dc.citation.woscount46-
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