完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chiang, JS | en_US |
dc.contributor.author | Chou, PC | en_US |
dc.contributor.author | Chang, TH | en_US |
dc.date.accessioned | 2014-12-08T15:39:37Z | - |
dc.date.available | 2014-12-08T15:39:37Z | - |
dc.date.issued | 2004-02-01 | en_US |
dc.identifier.issn | 0916-8508 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/27044 | - |
dc.description.abstract | This work presents a new sigma-delta modulator (SDM) architecture for a wide bandwidth receiver. This architecture contains dualbandwidth for W-CDMA and GSM system applications. Low-distortion swing-suppressing SDM and interpolative SDM cascaded units are used together. Using the low-distortion swing-suppressing technique, the resolution can be improved even under non-linearity effects. The interpolative SDM extends the signal bandwidth and represses the high-band noise. The SDM used in the W-CDMA and GSM applications was designed and simulated using 0.25-mum 1P5M CMOS technology. The simulated peak SNDR of W-CDMA and GSM are 72/70 dB and 82/84 dB in Low-IF/Zero-IF standards. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | sigma-delta modulator | en_US |
dc.subject | dual-band wideband A/D converter | en_US |
dc.subject | low distortion | en_US |
dc.subject | swing suppressing | en_US |
dc.subject | GSM and W-CDMA | en_US |
dc.title | Dual-band sigma-delta modulator for wideband receiver applications | en_US |
dc.type | Article | en_US |
dc.identifier.journal | IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES | en_US |
dc.citation.volume | E87A | en_US |
dc.citation.issue | 2 | en_US |
dc.citation.spage | 311 | en_US |
dc.citation.epage | 323 | en_US |
dc.contributor.department | 電控工程研究所 | zh_TW |
dc.contributor.department | Institute of Electrical and Control Engineering | en_US |
dc.identifier.wosnumber | WOS:000188857700003 | - |
dc.citation.woscount | 3 | - |
顯示於類別: | 期刊論文 |