標題: Low-temperature poly-Si thin-film transistor with a N2O-plasma ONO multilayer gate dielectric
作者: Chang, KM
Yang, WC
Hung, BF
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 2004
摘要: High-performance polycrystalline silicon (poly-Si) thin-film transistors (TFTs) with oxide/nitride/oxynitride (ONO) multilayer gate dielectrics were fabricated. The low-temperature (less than or equal to300degreesC) ONO multilayer dielectric uses three stacked layers: the bottom layer is a very thin N2O-plasma oxynitride deposited by plasma-enhanced chemical vapor deposition (PECVD), the middle layer is PECVD Si3N4, and the top layer is tetraethoxysilane (TEOS) oxide. The ONO gate dielectric on poly-Si films shows a very high breakdown field of 9.4 MV/cm, a longer time-dependent dielectric breakdown lifetime and a lower charge trapping rate than single-layer PECVD TEOS oxide or nitride. The fabricated poly-Si TFTs with ONO gate dielectric exhibited excellent transfer characteristics, high field-effect mobility of 213 cm(2)/V s, and an ON/OFF current ratio of over 10(8). (C) 2004 The Electrochemical Society.
URI: http://hdl.handle.net/11536/27265
http://dx.doi.org/10.1149/1.1753253
ISSN: 1099-0062
DOI: 10.1149/1.1753253
期刊: ELECTROCHEMICAL AND SOLID STATE LETTERS
Volume: 7
Issue: 7
起始頁: G148
結束頁: G150
顯示於類別:期刊論文