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dc.contributor.authorKer, MDen_US
dc.contributor.authorChang, CYen_US
dc.date.accessioned2014-12-08T15:40:48Z-
dc.date.available2014-12-08T15:40:48Z-
dc.date.issued2003-06-01en_US
dc.identifier.issn0021-4922en_US
dc.identifier.urihttp://dx.doi.org/10.1143/JJAP.42.3377en_US
dc.identifier.urihttp://hdl.handle.net/11536/27813-
dc.description.abstractPolysilicon diodes used in sub-quarter-micron complementary metal oxide semiconductor (CMOS) technologies are characterized by transmission line pulse (TLP) measurement to investigate device characteristics in a high-current regime. The second-breakdown current (I-t2) of the polysilicon diode shows good linear dependence on the device junction perimeter. When the polysilicon diodes are connected in a stacked configuration for reducing parasitic capacitance, the stacked polysilicon diodes show no degradation in electrostatic discharge (ESD) robustness compared with a single polysilicon diode. Such CMOS process-compatible polysilicon diodes have been successfully used as on-chip ESD protection devices for GHz radio-frequency (RF) circuits.en_US
dc.language.isoen_USen_US
dc.subjectpolysilicon diodeen_US
dc.subjectparasitic capacitanceen_US
dc.subjectsubstrate noiseen_US
dc.subjectelectrostatic discharge (ESD)en_US
dc.subjectradio frequency (RF)en_US
dc.titleHigh-current characterization of polysilicon diode for electrostatic discharge protection in sub-quarter-micron complementary metal oxide semiconductor technologyen_US
dc.typeArticleen_US
dc.identifier.doi10.1143/JJAP.42.3377en_US
dc.identifier.journalJAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERSen_US
dc.citation.volume42en_US
dc.citation.issue6Aen_US
dc.citation.spage3377en_US
dc.citation.epage3378en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000183927800017-
dc.citation.woscount0-
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