標題: | Growth of high-quality Ge epitaxial layers on Si(100) |
作者: | Luo, GL Yang, TH Chang, EY Chang, CY Chao, KA 材料科學與工程學系 電子工程學系及電子研究所 電子與資訊研究中心 Department of Materials Science and Engineering Department of Electronics Engineering and Institute of Electronics Microelectronics and Information Systems Research Center |
關鍵字: | Ge;SiGe;UHV/CVD;dislocation;heterostructure;TEM |
公開日期: | 15-五月-2003 |
摘要: | A method of growing high-quality epitaxial Ge layers on a Si(100) substrate is reported. In this method, a 0.8 mum Si0.1Ge0.9 layer was first grown. Due to the large lattice mismatch between this layer and the Si substrate, many dislocations form near the interface and in the lower part of the Si0.1Ge0.9 layer. A 0.8 mum Si0.05Ge0.95 layer and a 1.0 mum top Ge layer were subsequently grown on the Si0.1Ge0.9 layer. The formed interfaces of Si0.05Ge0.95/Si0.1Ge0.9 and Ge/Si0.05Ge0.95 can bend and terminate the upward-propagated dislocations very effectively. The in situ annealing process was also performed for each individual layer. Experimental results show that the dislocation density in the top Ge layer can be greatly reduced, and the surface is very smooth, while the total thickness of the structure is only 2.6 mum. |
URI: | http://dx.doi.org/10.1143/JJAP.42.L517 http://hdl.handle.net/11536/27866 |
ISSN: | 0021-4922 |
DOI: | 10.1143/JJAP.42.L517 |
期刊: | JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS |
Volume: | 42 |
Issue: | 5B |
起始頁: | L517 |
結束頁: | L519 |
顯示於類別: | 期刊論文 |