完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Tsai, CW | en_US |
dc.contributor.author | Chen, MC | en_US |
dc.contributor.author | Gu, SH | en_US |
dc.contributor.author | Wang, T | en_US |
dc.date.accessioned | 2014-12-08T15:41:09Z | - |
dc.date.available | 2014-12-08T15:41:09Z | - |
dc.date.issued | 2003-04-01 | en_US |
dc.identifier.issn | 0741-3106 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/LED.2003.810890 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/28006 | - |
dc.description.abstract | Negative substrate bias-enhanced oxide breakdown (BD) progression in ultrathin oxide (1.4 nm) pMOS is observed. The enhanced progression is attributed to the increase of hole-stress current resulting from BD-induced, channel-carrier heating. The carrier temperature extracted from the spectral distribution of hot-carrier luminescence is around 1300 K. The substrate bias dependence of post-BD hole-tunneling current is confirmed from measurement and calculation. The observed phenomenon is particularly significant to ultrathin gate oxide reliability in floating substrate (SOI) and forward-biased substrate devices. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | breakdown (BD) progression | en_US |
dc.subject | carrier temperature | en_US |
dc.subject | substrate bias | en_US |
dc.subject | ultrathin oxide pMOS | en_US |
dc.title | Substrate bias dependence of breakdown progression in ultrathin oxide pMOSFETs | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/LED.2003.810890 | en_US |
dc.identifier.journal | IEEE ELECTRON DEVICE LETTERS | en_US |
dc.citation.volume | 24 | en_US |
dc.citation.issue | 4 | en_US |
dc.citation.spage | 269 | en_US |
dc.citation.epage | 271 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000183670900022 | - |
dc.citation.woscount | 4 | - |
顯示於類別: | 期刊論文 |