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dc.contributor.authorYang, Wen-Linen_US
dc.contributor.authorHsieh, Wen-Hungen_US
dc.contributor.authorHung, Chung-Chihen_US
dc.date.accessioned2014-12-08T15:41:14Z-
dc.date.available2014-12-08T15:41:14Z-
dc.date.issued2009en_US
dc.identifier.isbn978-1-4244-2781-9en_US
dc.identifier.urihttp://hdl.handle.net/11536/28042-
dc.identifier.urihttp://dx.doi.org/10.1109/VDAT.2009.5158141en_US
dc.description.abstractThis paper presents the design of a third-order continuous-time (CT) single-bit active-RC sigma-delta (Sigma Delta) modulator for Bluetooth application. Through the use of the architecture, cascade of resonators with distributed feedback (CRFB), the signal bandwidth can be improved without increasing the order of the modulator. All integrators are implemented by active-RC type to have better linearity. Furthermore, in order to reduce the effect of the clock jitter, the feedback digital-to-analog converter (DAC) shape is realized by non-return-to-zero (NRZ). The modulator is designed in a standard digital 0.18 mu m CMOS process with a chip area of 1.32x1.23 mm(2). The measurement results show that the modulator achieves 56.8dB SNDR and 60dB dynamic range over 1MHz signal bandwidth, consuming 22.2mW at 1.8V supply.en_US
dc.language.isoen_USen_US
dc.titleA Third-Order Continuous-Time Sigma-Delta Modulator for Bluetoothen_US
dc.typeProceedings Paperen_US
dc.identifier.doi10.1109/VDAT.2009.5158141en_US
dc.identifier.journal2009 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT), PROCEEDINGS OF TECHNICAL PROGRAMen_US
dc.citation.spage247en_US
dc.citation.epage250en_US
dc.contributor.department電信工程研究所zh_TW
dc.contributor.departmentInstitute of Communications Engineeringen_US
dc.identifier.wosnumberWOS:000271941200062-
Appears in Collections:Conferences Paper


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