標題: DESIGN OF ON-CHIP POWER-RAIL ESD CLAMP CIRCUIT WITH ULTR-SMALL CAPACITANCE TO DETECT ESD TRANSITION
作者: Chen, Shih-Hung
Ker, Ming-Dou
電機學院
College of Electrical and Computer Engineering
公開日期: 2009
摘要: A power-rail ESD clamp circuit with a new proposed ESD-transient detection circuit which adopts a ultra small capacitor to achieve the required functions has been presented and substantiated to own a long turn-on duration and high turn-on efficiency. In addition, the power-rail ESD clamp circuits with the new proposed ESD-transient detection circuit also presented an excellent immunity against the mis-trigger and the latch-on event under the fast power-on condition.
URI: http://hdl.handle.net/11536/28053
ISBN: 978-1-4244-2781-9
期刊: 2009 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT), PROCEEDINGS OF TECHNICAL PROGRAM
起始頁: 327
結束頁: 330
顯示於類別:會議論文