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dc.contributor.authorLi, RZen_US
dc.contributor.authorHuang, SPen_US
dc.contributor.authorLin, FSen_US
dc.contributor.authorHong, MTen_US
dc.contributor.authorChen, PNen_US
dc.date.accessioned2014-12-08T15:41:16Z-
dc.date.available2014-12-08T15:41:16Z-
dc.date.issued2003-03-01en_US
dc.identifier.issn0253-3839en_US
dc.identifier.urihttp://hdl.handle.net/11536/28055-
dc.description.abstractIn this paper, we propose a pure combinational logic design for the implementation of IEEE802.11 Medium Access Control (MAC) protocol, in contrast to firmware implementation based on an embedded micro-engine. In order to have a timely response, a Control Frame Handler is also included in our MAC controller. A further improvement for timely manipulation on the time-critical management frames (such as Beacon, ATIM and Probe Response) is subsequently developed in our revised edition. Equipped with a self-developed PCMCIA unit, the functions of our MAC controller have been verified using two Altera EPF 10K-100 ARC240-2 FPGAs in an on-line MAC-to-MAC data exchange fashion. Experimental results show that a pure combinational logic design can easily achieve a baseband-interfacing throughput of over-100Mbps with a cost-effect gate count of 21702.en_US
dc.language.isoen_USen_US
dc.subjectIEEE 802.11en_US
dc.subjectmedium access controlen_US
dc.subjectwireless local area networken_US
dc.titleA combination logic design for a high speed IEEE 802.11 MAC controlleren_US
dc.typeArticleen_US
dc.identifier.journalJOURNAL OF THE CHINESE INSTITUTE OF ENGINEERSen_US
dc.citation.volume26en_US
dc.citation.issue2en_US
dc.citation.spage255en_US
dc.citation.epage259en_US
dc.contributor.department電信工程研究所zh_TW
dc.contributor.departmentInstitute of Communications Engineeringen_US
dc.identifier.wosnumberWOS:000181805900015-
dc.citation.woscount1-
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