完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.author | WANG, TH | en_US |
| dc.contributor.author | WU, SJ | en_US |
| dc.contributor.author | HUANG, CM | en_US |
| dc.date.accessioned | 2014-12-08T15:04:18Z | - |
| dc.date.available | 2014-12-08T15:04:18Z | - |
| dc.date.issued | 1993-11-01 | en_US |
| dc.identifier.issn | 0278-0070 | en_US |
| dc.identifier.uri | http://dx.doi.org/10.1109/43.248087 | en_US |
| dc.identifier.uri | http://hdl.handle.net/11536/2809 | - |
| dc.description.abstract | An integrated device and circuit analysis has been developed to evaluate the DX trap induced anomalous transient phenomena in DCFL and SCFL AlGaAs/GaAs HEMT inverters. The slow transient effect and the hysteretic characteristics of the input-output voltage transfer function in the inverters are simulated. The result shows that in comparison with the DCFL inverter, the DX trap effects are much improved in the SCFL inverter due to its particular operational principle. | en_US |
| dc.language.iso | en_US | en_US |
| dc.title | DEVICE AND CIRCUIT SIMULATION OF ANOMALOUS DX TRAP EFFECTS IN DCFL AND SCFL HEMT INVERTERS | en_US |
| dc.type | Article | en_US |
| dc.identifier.doi | 10.1109/43.248087 | en_US |
| dc.identifier.journal | IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS | en_US |
| dc.citation.volume | 12 | en_US |
| dc.citation.issue | 11 | en_US |
| dc.citation.spage | 1758 | en_US |
| dc.citation.epage | 1761 | en_US |
| dc.contributor.department | 交大名義發表 | zh_TW |
| dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
| dc.contributor.department | National Chiao Tung University | en_US |
| dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
| dc.identifier.wosnumber | WOS:A1993ML08900015 | - |
| dc.citation.woscount | 0 | - |
| 顯示於類別： | 期刊論文 | |
