標題: | Polycrystalline silicon thin-film transistor with self-aligned SiGe raised source/drain |
作者: | Peng, DZ Chang, TC Shih, PS Zan, HW Huang, TY Chang, CY Liu, PT 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 16-十二月-2002 |
摘要: | We have fabricated a polycrystalline silicon thin-film transistor with self-aligned SiGe raised source/drain (SiGe-RSD TFT). The SiGe-RSD regions were grown selectively by ultrahigh vacuum chemical vapor deposition at 550 degreesC. It was observed that, with SiH4 and GeH4 gas flow rates of 5 and 2 sccm, respectively, the poly-SiGe could be selectively grown up to 100 nm for source/drain regions. The resultant transistor structure features an ultrathin active channel region (20 nm) and a self-aligned thick source/drain region (120 nm), which is ideally suited for optimum performance. The significant improvements in electrical characteristics, such as higher turn-on current, lower leakage current, and higher drain breakdown voltage have been observed in the SiGe-RSD TFT, compared to the conventional TFT counterpart. These results indicate that TFTs with SiGe raised source/drain structure would be highly promising for ultrathin TFTs applications. (C) 2002 American Institute of Physics. |
URI: | http://dx.doi.org/10.1063/1.1528727 http://hdl.handle.net/11536/28311 |
ISSN: | 0003-6951 |
DOI: | 10.1063/1.1528727 |
期刊: | APPLIED PHYSICS LETTERS |
Volume: | 81 |
Issue: | 25 |
起始頁: | 4763 |
結束頁: | 4765 |
顯示於類別: | 期刊論文 |