標題: | Testing process capability for one-sided specification limit with application to the voltage level translator |
作者: | Lin, PC Pearn, WL 工業工程與管理學系 Department of Industrial Engineering and Management |
公開日期: | 1-十二月-2002 |
摘要: | Process capability indices C-PU and C-PL have been widely used in the microelectronics manufacturing industry as capability measures for processes with one-sided specification limits. In this paper, the theory of statistical hypothesis testing is implemented for normal processes, using the uniformly minimum variance unbiased estimators of Cpu and CPL. Efficient SAS computer programs are provided to calculate the critical values and the p-values required for making decisions. Useful critical values for some commonly used capability requirements are tabulated. Based on the test a simple but practical step-by-step procedure is developed for in-plant applications. An example on the voltage level translator manufacturing process is given to illustrate how the proposed procedure may be applied to test whether the process meets the preset capability requirement. (C) 2002 Elsevier Science Ltd. All rights reserved. |
URI: | http://dx.doi.org/10.1016/S0026-2714(02)00103-8 http://hdl.handle.net/11536/28333 |
ISSN: | 0026-2714 |
DOI: | 10.1016/S0026-2714(02)00103-8 |
期刊: | MICROELECTRONICS RELIABILITY |
Volume: | 42 |
Issue: | 12 |
起始頁: | 1975 |
結束頁: | 1983 |
顯示於類別: | 期刊論文 |