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dc.contributor.authorChang, Chin-Chengen_US
dc.contributor.authorLeu, Jihperngen_US
dc.contributor.authorLin, Mao-Hsingen_US
dc.contributor.authorHuang, Kun-Fengen_US
dc.date.accessioned2014-12-08T15:41:54Z-
dc.date.available2014-12-08T15:41:54Z-
dc.date.issued2009en_US
dc.identifier.urihttp://hdl.handle.net/11536/28498-
dc.description.abstractMura defect induced by chip-on-glass packaging in 13-inch LCD-TFT was investigated using contour measurement and numerical analysis. Excellent correlation between Mura defect and localized warpage/principal stress has been established Besides, the effects of ACF bonding temperatures and Si chip arrangement on Mura defect were studied and discussed.en_US
dc.language.isoen_USen_US
dc.titleEffects of Localized Warpage and Stress on Chip-on-Glass Packaging Induced Light Leakage Phenomenon in 13-inch TFT-LCDen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2009 SID INTERNATIONAL SYMPOSIUM DIGEST OF TECHNICAL PAPERS, VOL XL, BOOKS I - IIIen_US
dc.citation.spage838en_US
dc.citation.epage841en_US
dc.contributor.department材料科學與工程學系zh_TW
dc.contributor.departmentDepartment of Materials Science and Engineeringen_US
dc.identifier.wosnumberWOS:000272997600217-
Appears in Collections:Conferences Paper