Effects of localized warpage and stress on chip-on-glass packaging: Induced light-leakage phenomenon in mid-sized TFT-LCD

Abstract

Mura defects become visible in a 13.3-in. TFT-LCD using chip-on-glass (COG) packaging when the thickness of the glass substrate is decreased from 0.5 to 0.3 mm. Mura, the non-uniform brightness in LCDs, is caused by COG packaging due to the mismatch of the coefficient of thermal expansion (CTE) and Young's modulus between the glass substrate and the IC-driver Si chips. In this paper, a 3-D finite-element-analysis (FEA) model, coupled with transient thermal analysis is first established to examine the warpage and stress behavior in the upper-glass-plate post-COG-package processing for identifying the root causes of the light-leakage phenomenon. Prior to that, the simulated warpage results are validated by surface-contour measurement. Data and modeling results show that a low bonding temperature together with a low modulus in novel ACF materials can effectively eliminate Mura. Besides, thinner silicon or a shorter length of Si chips as drivers offers enhanced reduction in the localized warpage, and thus can be a practical and low-cost solution for eliminating mura defects.