Effects of Localized Warpage and Stress on Chip-on-Glass Packaging Induced Light Leakage Phenomenon in 13-inch TFT-LCD

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	Chang, Chin-Cheng	en_US
dc.contributor.author	Leu, Jihperng	en_US
dc.contributor.author	Lin, Mao-Hsing	en_US
dc.contributor.author	Huang, Kun-Feng	en_US
dc.date.accessioned	2014-12-08T15:41:54Z	-
dc.date.available	2014-12-08T15:41:54Z	-
dc.date.issued	2009	en_US
dc.identifier.uri	http://hdl.handle.net/11536/28498	-
dc.description.abstract	Mura defect induced by chip-on-glass packaging in 13-inch LCD-TFT was investigated using contour measurement and numerical analysis. Excellent correlation between Mura defect and localized warpage/principal stress has been established Besides, the effects of ACF bonding temperatures and Si chip arrangement on Mura defect were studied and discussed.	en_US
dc.language.iso	en_US	en_US
dc.title	Effects of Localized Warpage and Stress on Chip-on-Glass Packaging Induced Light Leakage Phenomenon in 13-inch TFT-LCD	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.journal	2009 SID INTERNATIONAL SYMPOSIUM DIGEST OF TECHNICAL PAPERS, VOL XL, BOOKS I - III	en_US
dc.citation.spage	838	en_US
dc.citation.epage	841	en_US
dc.contributor.department	材料科學與工程學系	zh_TW
dc.contributor.department	Department of Materials Science and Engineering	en_US
dc.identifier.wosnumber	WOS:000272997600217	-
顯示於類別：	會議論文