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dc.contributor.authorKer, MDen_US
dc.contributor.authorChuang, CHen_US
dc.date.accessioned2014-12-08T15:42:23Z-
dc.date.available2014-12-08T15:42:23Z-
dc.date.issued2002-06-01en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/LED.2002.1004236en_US
dc.identifier.urihttp://hdl.handle.net/11536/28779-
dc.description.abstractA stacked-NMOS triggered silicon-controlled rectifier (SNTSCR) is proposed as the electrostatic discharge (ESD) clamp device to protect the mixed-voltage I/O buffers of CMOS ICs. This SNTSCR device is fully compatible to general CMOS processes without using the thick gate oxide to overcome the gate-oxide reliability issue. ESD robustness of the proposed SNTSCR device with different layout parameters has been investigated in a 0.35-mum CMOS process. The HBM ESD level of the mixed-voltage I/O buffer with the stacked-NMOS channel width of 120 mum can be obviously improved from the original similar to2 kV to be greater than 8 kV by this SNTSCR device with a device dimension of only 60 mum/0.35 mum.en_US
dc.language.isoen_USen_US
dc.subjectelectrostatic discharge (ESD)en_US
dc.subjectESD protectionen_US
dc.subjectmixed-voltage I/O bufferen_US
dc.subjectsilicon-controlled rectifier (SCR)en_US
dc.titleStacked-NMOS triggered silicon-controlled rectifier for ESD protection in high/low-voltage-tolerant I/O interfaceen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/LED.2002.1004236en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume23en_US
dc.citation.issue6en_US
dc.citation.spage363en_US
dc.citation.epage365en_US
dc.contributor.department電機學院zh_TW
dc.contributor.departmentCollege of Electrical and Computer Engineeringen_US
dc.identifier.wosnumberWOS:000175844800023-
dc.citation.woscount4-
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