標題: | Characteristics of polycrystalline silicon thin-film transistors with electrical source/drain extensions induced by a bottom sub-gate |
作者: | Yu, M Lin, HC Chen, GH Huang, TY Lei, TF 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | poly-Si;thin-film transistor (TFT);field-induced drain;leakage;sub-gate |
公開日期: | 1-五月-2002 |
摘要: | Characteristics of polycrystalline silicon thin-film transistors (TFT) with source/drain extensions induced by a bottom sub-gate were explored, high on/off current ratio up to 10(7) could be achieved for both n- and p-channel devices. Nevertheless, the performance is significantly degraded by a marked increase of off-state leak-age current when the channel length is scaled below 1 mum. Moreover, a hump in the subthreshold current-voltage regime is observed. After careful analysis, it is found that the leakage current is strongly dependent on the field strength and is not a thermally activated process. A leakage path along the bottom interface of the poly-Si channel layer is proposed to explain these results. |
URI: | http://dx.doi.org/10.1143/JJAP.41.2815 http://hdl.handle.net/11536/28807 |
ISSN: | 0021-4922 |
DOI: | 10.1143/JJAP.41.2815 |
期刊: | JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS |
Volume: | 41 |
Issue: | 5A |
起始頁: | 2815 |
結束頁: | 2820 |
顯示於類別: | 期刊論文 |