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dc.contributor.authorShen, WZen_US
dc.contributor.authorLin, JYen_US
dc.contributor.authorLu, JMen_US
dc.date.accessioned2014-12-08T15:01:26Z-
dc.date.available2014-12-08T15:01:26Z-
dc.date.issued1997-10-01en_US
dc.identifier.issn0916-8508en_US
dc.identifier.urihttp://hdl.handle.net/11536/288-
dc.description.abstractIn this paper, we present CB-Porver, a hierarchical power analysis and characterization environment of cell-based CMOS circuits. The environment includes two parts, a cell characterization system for timing, input capacitance as well as power and a cell-based power estimation system. The characterization system can characterize basic, complex and transmission gates. During the characterization, input slew rate, output loading, capacitive feedthrough effect and the logic state dependence of nodes in a cell are all taken into account. The characterization methodology separates the power consumption of a cell into three components, e.g., capacitive feedthrough power. short-circuit power and dynamic power. With the characterization data, a cell-based power estimator (CBPE) embedded in Verilog-XL is used for estimating the power consumption of the gates in a circuit. CBPE is also a hierarchical power estimator. Macrocells such as flip-flops and adders are partitioned into primitive gates during power estimation. Experimental results on a set of MCNC benchmark circuits show that the power estimation based on our power modeling and characterization provides within 6% error of SPICE simulation on average while the CPU time consumed is more than two orders of magnitude less.en_US
dc.language.isoen_USen_US
dc.subjecthierarchical cell-based power estimationen_US
dc.subjectpower characterizationen_US
dc.subjectpower modelingen_US
dc.subjectgate-level power analysis environmenten_US
dc.titleCB-power: A hierarchical power analysis and characterization environment of cell-based CMOS circuitsen_US
dc.typeArticle; Proceedings Paperen_US
dc.identifier.journalIEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCESen_US
dc.citation.volumeE80Aen_US
dc.citation.issue10en_US
dc.citation.spage1908en_US
dc.citation.epage1914en_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:A1997YE24900023-
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