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dc.contributor.authorWang, PCen_US
dc.contributor.authorChan, CTen_US
dc.contributor.authorChen, YCen_US
dc.date.accessioned2014-12-08T15:42:48Z-
dc.date.available2014-12-08T15:42:48Z-
dc.date.issued2002-02-15en_US
dc.identifier.issn0140-3664en_US
dc.identifier.urihttp://dx.doi.org/10.1016/S0140-3664(01)00360-7en_US
dc.identifier.urihttp://hdl.handle.net/11536/29013-
dc.description.abstractNowadays, the commonly used table lookup scheme for IP routing is based on the so-called classless interdomain routing (CIDR). With CIDR, routers must find out the best matching prefix (BMP) for IP packets forwarding, which complicates the IP lookup. Currently, this process is mainly done in software and several schemes have been proposed for hardware implementation. Since the IP lookup performance is a major design issue for the stew generation routers, in this article we propose a fast IP address lookup scheme, which significantly reduces the forwarding table to fit into SRAM with very low cost. It can also be implemented in hardware using the pipeline technique. By using our proposed method, the required memory space can be 90-170 Kb less than the previous scheme and three memory accesses for a lookup in the worst case. When implemented in hardware pipeline architecture, our mechanism can achieve one routing lookup per memory access. (C) 2002 Elsevier Science B.V. All rights reserved.en_US
dc.language.isoen_USen_US
dc.subjectIP routingen_US
dc.subjectclassless interdomain routingen_US
dc.subjectpipeline techniqueen_US
dc.titleHigh-performance IP routing table lookupen_US
dc.typeArticleen_US
dc.identifier.doi10.1016/S0140-3664(01)00360-7en_US
dc.identifier.journalCOMPUTER COMMUNICATIONSen_US
dc.citation.volume25en_US
dc.citation.issue3en_US
dc.citation.spage303en_US
dc.citation.epage312en_US
dc.contributor.department資訊工程學系zh_TW
dc.contributor.departmentDepartment of Computer Scienceen_US
dc.identifier.wosnumberWOS:000174033400010-
dc.citation.woscount1-
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