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dc.contributor.authorSu, JGen_US
dc.contributor.authorHsu, HMen_US
dc.contributor.authorWong, SCen_US
dc.contributor.authorChang, CYen_US
dc.contributor.authorHuang, TYen_US
dc.contributor.authorSun, JYCen_US
dc.date.accessioned2014-12-08T15:43:22Z-
dc.date.available2014-12-08T15:43:22Z-
dc.date.issued2001-10-01en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/55.954918en_US
dc.identifier.urihttp://hdl.handle.net/11536/29359-
dc.description.abstractThe radio-frequency (RF) figures of merit of 0.18 mum complementary metal-oxide-semiconductor (CMOS) technology are investigated by evaluating the unity-current-gain cutoff frequency (F-t) and maximum oscillation frequency (F-max). The device fabricated with an added deep n-well structure is shown to greatly enhance both the cutoff frequency and the maximum oscillation frequency, with negligible dc disturbance. Specifically, 18% increase in F-t and 25% increase in F-max are achieved. Since the deep n-well implant can be easily adopted in a standard CMOS process, the approach appears to be very promising for future CMOS RF applications.en_US
dc.language.isoen_USen_US
dc.subjectCMOSen_US
dc.subjectdeep n-wellen_US
dc.subjectmaximum oscillation frequencyen_US
dc.subjectradio-frequencyen_US
dc.subjectunity current-gain cutoff frequencyen_US
dc.titleImproving the RF performance of 0.18 mu m CMOS with deep n-well implantationen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/55.954918en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume22en_US
dc.citation.issue10en_US
dc.citation.spage481en_US
dc.citation.epage483en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000171432400009-
dc.citation.woscount21-
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