Using spike-anneal to reduce interfacial layer thickness and leakage current in metal-oxide-semiconductor devices with TaN/Atomic layer deposition-grown HfAlO/chemical oxide/Si structure

Abstract

In this study, the characteristics of Ta/chemical SiO(2)/Si devices with their chemical oxides formed by various chemicals, including HNO(3), SCl, and H(2)SO(4)+H(2)O(2) solutions, were first investigated. We found the HNO(3) split depicts the lowest leakage current and the best hysteresis behavior. Next, chemical oxide formed by HNO(3) was applied to form the interfacial SiO(2) layer for metal-oxide-semiconductor (MOS) devices with Ta/HfAlO/chemical SiO(2)/Si structrue. The effects of a high-temperature spike anneal were then studied. We found that the spike-anneal process can effectively reduce the thickness of the chemical oxide from 10 to 7 angstrom, thus is beneficial in preserving the low effective oxide thickness (EOT) of the structure. Furthermore, both the gate leakage current and stress-induced leakage current (SILC) were also effectively suppressed by the high-temperature spike-anneal.