Title: | A total standard WIP estimation method for wafer fabrication |
Authors: | Lin, YH Lee, CE 工業工程與管理學系 Department of Industrial Engineering and Management |
Keywords: | wafer release;fixed-WIP;total standard WIP level;queueing network theory |
Issue Date: | 16-May-2001 |
Abstract: | The standard work-in-process (WIP) level in a wafer fabrication factory is an important parameter which can be properly used to trigger the decision of when to release specific wafer lots. There are many WIP-based release control policies which have been proven to be effective for wafer fabrication manufacturing, few methods have been proposed to find the suitable WIP-level as a parameter for these release policies. This paper proposes a queueing network-based algorithm to determine the total standard WIP level so that the Fixed-WIP release algorithm to determine the total standard WIP level so that the Fixed-WIP release control policy can apply. A numerical example is provided to elaborate the algorithm. A simulation model of a real-world wafer fabrication factory in Taiwan is built and analyzed. Results of simulation experiment indicate that under the Fixed-WIP control policy, the total standard WIP level estimated from this study achieves a target throughput rate while keeping the corresponding cycle time relatively low. Results also demonstrate that the queueing network-based algorithm is a very useful method to determine the standard WIP level efficiently. (C) 2001 Elsevier Science B.V. All rights reserved. |
URI: | http://dx.doi.org/10.1016/S0377-2217(99)00446-4 http://hdl.handle.net/11536/29642 |
ISSN: | 0377-2217 |
DOI: | 10.1016/S0377-2217(99)00446-4 |
Journal: | EUROPEAN JOURNAL OF OPERATIONAL RESEARCH |
Volume: | 131 |
Issue: | 1 |
Begin Page: | 78 |
End Page: | 94 |
Appears in Collections: | Articles |
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