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dc.contributor.authorHuang, CYen_US
dc.contributor.authorTeng, THen_US
dc.contributor.authorYang, CJen_US
dc.contributor.authorTseng, CHen_US
dc.contributor.authorCheng, HCen_US
dc.date.accessioned2014-12-08T15:44:00Z-
dc.date.available2014-12-08T15:44:00Z-
dc.date.issued2001-04-01en_US
dc.identifier.issn0021-4922en_US
dc.identifier.urihttp://dx.doi.org/10.1143/JJAP.40.L316en_US
dc.identifier.urihttp://hdl.handle.net/11536/29746-
dc.description.abstractThis work investigates the temperature and illumination effects on the a-SM thin-film transistors (a-SiH TFTs) under AC gate bias stress to find the larger threshold voltage shift and subthreshold swing change for the bias-temperature-stress (BTS) and bias-illumination-stress (BIS). Excess carriers from thermal-generation electron-hole pairs or photoexcited electron-hole pairs may significantly influence the instability of a-SM TFTs during bias stress. The instability mechanisms originate from the carrier-induced defect Creation enhanced by thermal generation in the BTS case and also emphasized by photoexcitation for the BIS case. Both stress conditions will induce a larger threshold voltage shift and higher cutoff frequency than those for simple bias stresses.en_US
dc.language.isoen_USen_US
dc.subjecta-Si : H TFTsen_US
dc.subjectACen_US
dc.subjectbias-temperature-stressen_US
dc.subjectbias-illumination-stressen_US
dc.titleEffect of temperature and illumination on the instability of a-Si : H thin-film transistors under AC gate bias stressen_US
dc.typeArticleen_US
dc.identifier.doi10.1143/JJAP.40.L316en_US
dc.identifier.journalJAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERSen_US
dc.citation.volume40en_US
dc.citation.issue4Aen_US
dc.citation.spageL316en_US
dc.citation.epageL318en_US
dc.contributor.department奈米中心zh_TW
dc.contributor.departmentNano Facility Centeren_US
dc.identifier.wosnumberWOS:000170777200005-
dc.citation.woscount5-
Appears in Collections:Articles


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