標題: | Fault diagnosis for linear analog circuits |
作者: | Lin, JW Lee, CL Su, CC Chen, JE 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | fault diagnosis;signal flow graph;diagnosing evaluators;un-powered network |
公開日期: | 2001 |
摘要: | This paper presents a novel scheme to diagnose single and double faults for linear analog circuits. The scheme first proposes a simple transformation procedure to transform the tested linear analog circuit into a discrete signal flow graph, then constructs "diagnosing evaluators," which model the faulty components, to form a diagnosis configuration to diagnose the faults through digital simulation. This saves much computation time. Furthermore, a simple method to un-power OP's is also proposed to differentiate equivalent faults. The scheme can diagnose faults in passive components as well as active faults in OP's. |
URI: | http://hdl.handle.net/11536/29968 http://dx.doi.org/10.1023/A:1012816621144 |
ISSN: | 0923-8174 |
DOI: | 10.1023/A:1012816621144 |
期刊: | JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS |
Volume: | 17 |
Issue: | 6 |
起始頁: | 483 |
結束頁: | 494 |
顯示於類別: | 期刊論文 |