完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chen, CM | en_US |
dc.contributor.author | Chang, SJ | en_US |
dc.contributor.author | Chou, JW | en_US |
dc.contributor.author | Lin, T | en_US |
dc.contributor.author | Yeh, WK | en_US |
dc.contributor.author | Chang, CY | en_US |
dc.contributor.author | Luo, WZ | en_US |
dc.contributor.author | Lee, YJ | en_US |
dc.contributor.author | Chao, TS | en_US |
dc.contributor.author | Huang, TY | en_US |
dc.date.accessioned | 2014-12-08T15:44:25Z | - |
dc.date.available | 2014-12-08T15:44:25Z | - |
dc.date.issued | 2001-01-01 | en_US |
dc.identifier.issn | 0021-4922 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/30008 | - |
dc.description.abstract | A complete study on the effects of indium channel implant energy on transistor characteristics including carrier mobility, drain current, drain induce barrier lowering (DIBL), device breakdown, junction leakage, impact ionization rate and hot-carrier degradation were performed on 0.1 mum devices. It was found that devices with super-steep-retrograde (SSR) indium channel profile depict higher transconductance in linear region, albeit the saturation drive current is lower, compared to the conventional BF2-doped control. In addition, In-doped devices also depict improved DIBL, I-on-I-off current ratio and transistor breakdown voltage. Finally, by increasing the indium implant energy, devices depict an improved transconductance, reduced DIBL and hot-carrier degradation, while suffering larger junction leakage and capacitance. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | indium | en_US |
dc.subject | super-steep-retrograde (SSR) | en_US |
dc.subject | mobility | en_US |
dc.subject | junction leakage and saturation drive current | en_US |
dc.title | The effects of super-steep-retrograde indium channel profile on deep submicron n-channel metal-oxide-semiconductor field-effect transistor | en_US |
dc.type | Article | en_US |
dc.identifier.journal | JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS | en_US |
dc.citation.volume | 40 | en_US |
dc.citation.issue | 1 | en_US |
dc.citation.spage | 75 | en_US |
dc.citation.epage | 79 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000167217400015 | - |
dc.citation.woscount | 0 | - |
顯示於類別: | 期刊論文 |