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dc.contributor.authorJiang, IHRen_US
dc.contributor.authorChang, YWen_US
dc.contributor.authorJou, JYen_US
dc.date.accessioned2014-12-08T15:44:51Z-
dc.date.available2014-12-08T15:44:51Z-
dc.date.issued2000-09-01en_US
dc.identifier.issn0278-0070en_US
dc.identifier.urihttp://dx.doi.org/10.1109/43.863640en_US
dc.identifier.urihttp://hdl.handle.net/11536/30285-
dc.description.abstractNoise, as well as area, delay, and power, is one of the most important concerns in the design of deep submicrometer integrated circuits. Currently existing algorithms do not handle simultaneous switching conditions of signals for noise minimization. In this paper, we model not only physical coupling capacitance, but also simultaneous switching behavior for noise optimization. Based on Lagrangian relaxation, we present an algorithm which ran optimally solve the simultaneous noise, area, delay, and power optimization problem by sizing circuit components. Our algorithm, with linear memory requirement and linear runtime, is very effective and efficient. For example, for a circuit of 6144 wires and 3512 gates, our algorithm solves the simultaneous optimization problem using only 2.1-MB memory and 19.4-min runtime to achieve the precision of within 1% error on a SUN Spare Ultra-I workstation.en_US
dc.language.isoen_USen_US
dc.subjectdeep submicrometeren_US
dc.subjectgate sizingen_US
dc.subjectinterconnecten_US
dc.subjectperformance optimizationen_US
dc.subjectphysical designen_US
dc.subjectroutingen_US
dc.titleCrosstalk-driven interconnect optimization by simultaneous gate and wire sizingen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/43.863640en_US
dc.identifier.journalIEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMSen_US
dc.citation.volume19en_US
dc.citation.issue9en_US
dc.citation.spage999en_US
dc.citation.epage1010en_US
dc.contributor.department資訊工程學系zh_TW
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Computer Scienceen_US
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000088959300004-
dc.citation.woscount28-
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