標題: Improvements of amorphous-silicon inverted-staggered thin-film transistors using high-temperature-deposited Al gate with chemical mechanical polishing
作者: Shih, PS
Chang, TC
Liang, CY
Huang, TY
Chang, CY
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 1-May-2000
摘要: Chemical mechanical polished Al (CMP-Al) films deposited at various temperatures were explored as the gate electrodes of amorphous- silicon (a-Si:H) inverted-staggered thin-film transistors (TFTs) for the first time. Although the surface roughness of the as-deposited Al films increased with increasing deposition temperature, Al films deposited at higher temperature were more robust to hillock formation during subsequent annealing. To take advantage of the better hillock suppression properties, CMP is employed to reduce the inherently large surface roughness of these high-temperature-deposited Al films. Our results show that the electrical characteristics of the TFTs are significantly improved. Specifically, the threshold voltage is reduced from 2.37 to 1.43 V, the mobility is improved from 0.32 to 1.36 cm(2)/V s, and the subthreshold swing is improved from 0.72 to 0.58 V/decade as the Al deposition temperature is increased from 25 to 400 degrees C. (C) 2000 The Electrochemical Society. S1099-0062(99)10-107-X. All rights reserved.
URI: http://dx.doi.org/10.1149/1.1391011
http://hdl.handle.net/11536/30544
ISSN: 1099-0062
DOI: 10.1149/1.1391011
期刊: ELECTROCHEMICAL AND SOLID STATE LETTERS
Volume: 3
Issue: 5
起始頁: 235
結束頁: 238
Appears in Collections:Articles


Files in This Item:

  1. 000086381100010.pdf

If it is a zip file, please download the file and unzip it, then open index.html in a browser to view the full text content.