Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Lin, JY | en_US |
dc.contributor.author | Shen, WZ | en_US |
dc.contributor.author | Jou, JY | en_US |
dc.date.accessioned | 2014-12-08T15:46:14Z | - |
dc.date.available | 2014-12-08T15:46:14Z | - |
dc.date.issued | 1999-09-01 | en_US |
dc.identifier.issn | 1063-8210 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/92.784099 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/31096 | - |
dc.description.abstract | To characterize the power consumption of a macrocell, a general method involves recording the power consumption of all possible input transition events in the look-up tables. However, though this approach is accurate, the size of the table becomes very large. In this paper, we propose a new power modeling technique that takes advantage of the structural information of a macrocell, In this approach, a subset of primary inputs and internal nodes in the macrocell are selected as the state variables to build a state transition graph (STG), These state variables can model the steady-state transitions completely. Moreover, by selecting the characterization patterns properly, the STG can also model the glitch power in the macrocell accurately. To further simplify the complexity of the STG, an incomplete power modeling technique is presented. Without losing much accuracy, the property of compatible patterns is exploited for a macrocell to further reduce the number of edges in the corresponding STG, Experimental results show that our modeling techniques can provide SPICE-like accuracy, while the size of the look-up table is significantly reduced. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | power characterization | en_US |
dc.subject | power modeling for macrocells | en_US |
dc.subject | simulation-based RTL power estimation | en_US |
dc.subject | state transition graph | en_US |
dc.title | A structure-oriented power modeling technique for macrocells | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/92.784099 | en_US |
dc.identifier.journal | IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS | en_US |
dc.citation.volume | 7 | en_US |
dc.citation.issue | 3 | en_US |
dc.citation.spage | 380 | en_US |
dc.citation.epage | 391 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000082280400010 | - |
dc.citation.woscount | 1 | - |
Appears in Collections: | Articles |
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